Discussion:
need help on USB 6008
(too old to reply)
Paul C.
2007-11-13 21:10:06 UTC
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Hi Tao,

Unfortunately, the USB-6008 doesn't have dynamic Digital I/O.  You can
only do software timed output.  Were you planning on using software
timing to time the digital output non-overlap clocks or were you going
to use external circuits to break up a counter output (digital pulse
train) into the two non-overlapping clocks?  I would like to mention
that the accuracy of a software timed clock is system dependent and may
not be possible at millisecond or faster speeds.  In addition, I would
like to mention that the speed you could create these clocks would
depend on
the fastest portion of the signal (I'm assuming the point where both
are switched low prior to one going high - essentially, where the lows
overlap).

I also wanted to make sure that I fully understand how you will need to implement the non-overlap clocks.&nbsp; <a href="http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/12-gatedelay/40-tpcg/two-phase-clock-gen_print.html" target="_blank">Here</a>
is a picture of how I visualize these clocks.&nbsp; Take a look at the
bottom of the page and tell me if that is what you're going to
implement.&nbsp; Once again are you going to need to generate both of those
pulse trains with a digital output line or are you going to do it with
external circuits (where you provide a clock to it and it splits it
into two clocks)?

I'd also like to mention that it would be fairly simple to build a
LabVIEW program to output a series of 1's and 0's on a line or port.&nbsp;
All you need to do is run a for loop that&nbsp; will index an array and
output a portion of the array every iteration of the loop.&nbsp; For
example, I made a simple example that counts on the digital lines from
0-15 (0000,0001,0010, etc.).&nbsp; The code I used is shown below.<img src="Loading Image...">

I hope this helps you get started,
Paul C.Message Edited by Paul C. on 11-13-2007 02:56 PM


swdigitaloutput2.JPG:
http://forums.ni.com/attachments/ni/250/34855/1/swdigitaloutput2.JPG
smthiid
2007-11-14 04:10:07 UTC
Permalink
Thanks, Paul. We are planning to use software timing to time the digital output non-overlap clocks (use LabVIEW and USB 6008), and the link you provide exactly describe what we want to realize. We won't use external circuits to generate clocks. We can accept low speeds, we just need to inject the set of 0's and 1's into our scan-chain before test.
I see your LabVIEW block, it's very helpful. Thanks again. But we still need two non-overlap clocks to sample it. Is there any functional blocks in LabVIEW to create some pulse signals whose duty cycle are&nbsp;less than 0.5? Message Edited by smthiid on 11-13-2007 10:09 PM
Paul C.
2007-11-14 19:40:13 UTC
Permalink
Hi Tao,
It shouldn't be too difficult to program the non-overlapping clocks.&nbsp; Basically, you
need to use multiple DAQmx write vis to switch the two clock lines to
generate the non-overlap clocks.&nbsp; This can be accomplished through a
state machine.&nbsp; I've gone ahead written a slow example of how to output
two non-overlapping clocks on the first two lines of a port such as
port 0.&nbsp; All it does is change the outputs low for 1 second, change one
output high for 3 seconds (this is done by sending a 1 or 00000001 to turn the first
line high), change them both low again for 1 second, and finally send the other line
high for another 3 seconds (00000010).&nbsp; By repeating this you can see that lines 0 and 1 will
be used as the clock.&nbsp; Here is a picture of the block diagram of the
example.
<img src="Loading Image...">
I hope this helps,
Paul C.Message Edited by Paul C. on 11-14-2007 01:36 PM


non-overlapclocks1.vi:
http://forums.ni.com/attachments/ni/250/34884/1/non-overlapclocks1.vi


non-overlapclocks3.JPG:
http://forums.ni.com/attachments/ni/250/34884/4/non-overlapclocks3.JPG
smthiid
2008-08-11 19:40:11 UTC
Permalink
Hi Paul,
&nbsp;
Sorry to bother you again after so long a time that I guess you already forget what we were talking about before. Basically, I was using LabView and USB-6008 to build a scan chain, which could creat two non-overlap clocks and input a data to my chip every 600ms. It works fine and thanks to your previous kind help. Now I have another question:
&nbsp;
Previously I input a series of data into my chip every 600ms, and when I tried to increase this data rate by 2 or 10, I found the timing of the two non-overlap clocks were not accurate enough (jitter is large) therefore I just&nbsp;accepted the slower data rate. However, now when&nbsp;we are&nbsp;going to test another chip, this data rate seems too slow because we want to input many data for many times.
&nbsp;
I noticed that you said USB-6008 was software timed and "the accuracy of a software timed clock is system dependent and may not be possible at millisecond or faster speeds". What do you mean by saying "system dependent"? Is it a "computer system", or "NI DAQ system"? How can I learn the fartest data rate I can achieve? What if I want to increase the data rate? Need I upgrade my computer, or buy another NI DAQ which is hardware timed?
&nbsp;
Another thought is that if I use the "Timed loop" or "Timed sequence" structure, will it be more accurate in time domain&nbsp;than the "Case structure" with "wait" or "wait until" block?
&nbsp;
Thank you very much,
Tao
Paul C.
2008-08-12 16:40:24 UTC
Permalink
Hi Tao, What I meant by system dependant is that the speed of your computer can greatly impact the speed that you can do a software timed generation / acquisition.&nbsp; If you need faster than millisecond speeds, my recommendation would be to look at purchasing a card that can do hardware-timed generation or acquisition.&nbsp; If you have set data you need to input into your chip, you can load and send that data to a hardware-timed digital I/O line to output it as fast as the timing engine on the card can handle.&nbsp; This will also help considerably with issues of "jitter".&nbsp; The other problem with software timed acquisition is that you have to wait for your computer processor to handle each event.&nbsp; Sometimes, when the computer is busy, it takes longer to handle this event.&nbsp; This creates "jitter" in a changing generated signal.&nbsp;&nbsp; "Another thought is that if I use the "Timed
loop" or "Timed sequence" structure, will it be more accurate in time
domain&nbsp;than the "Case structure" with "wait" or "wait until" block?"&nbsp; I don't forsee any improvement.&nbsp; It should be about the same.I hope this helps,Paul C.
&nbsp;
smthiid
2008-08-12 16:40:25 UTC
Permalink
Hi Paul,
Thanks for quick reply. Could you recommend some NI DAQ card which is hardware-timed? I tried to search them in NI USB DAQ products but failed to find any. Thanks.
-Tao
Paul C.
2008-08-12 16:40:25 UTC
Permalink
Hi Tao, All of the USB M-series cards support hardware-timed Digital I/O.&nbsp; One example of this is the USB-6229 which can be found <a href="http://sine.ni.com/nips/cds/view/p/lang/en/nid/203094" target="_blank">here</a>.&nbsp; The important note is that they do not have their own devoted Digital I/O timing engine.&nbsp; This means that you will have to use the Analog Input, Analog output, or counters to generate a clock for your digital operations. I hope this helps,Paul C.
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